Hybridization of CMOS with CNT-Based Complementary Nano Electro-Mechanical Switch for Low-Leakage and Robust Embedded Memory Design

In the nanometer era of VLSI technology, exponential increase in leakage power with technology scaling has become a major design concern. Embedded Static Random Access Memory (SRAM) is a major part of modern nanoelectronic systems. However, over the years, the integration density of SRAM has increased steadily along with associated increase in leakage power and decrease in robustness. The decrease in robustness often manifests itself as “failures” in basic memory operations like read, write and hold. Carbon nanotubes (CNTs), in recent times, have generated a lot of interest because of their exceptional electrical, mechanical and thermal properties, which have motivated investigations on building nano electromechanical system (NEMS) switches with them. In this paper, we propose integration of a specific CNT-based NEMS complementary switch with CMOS SRAM cells to achieve significant decrease in memory leakage power (~19X) and increase in robustness due to bitline leakage reduction (~55X).